armv7 cpsr

The ARM manual, ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition, describes three types of CPU status registers: Current Program Status Register (CPSR) Provides information about the currently executing program, both at an application level and a system level.

ARM v6/v7 maintains a status register called the CPSR (current program status register) that holds four status bits, negative (N), zero (Z), carry (C), and overflow (O). These bits can be used for conditional execution of subsequent instructions.

Accessing the CPSR. CPSR can be read using the MRS instruction and written using the MSR (register) or MSR (immediate) instructions.

This is an application level alias for the Current Program Status Register (CPSR). The system level view of the CPSR extends the register, adding system level information. Each of the exception modes has its own saved copy of the CPSR, the Saved Program Status Register (SPSR), as shown in Figure 10.1. For example, the SPSR for Monitor mode is ...